Basic UVM testbench for a Stream Processor
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Testbench Qualification


Verification environments can be wrong. The testbench itself must be qualified as being up to the task before it can be used to verify anything else. This section describes the scope and limits of this testbench, and what faults are required to be injected by the DUT in order to qualify the testbench itself; yes, the DUT will be crippled on purpose. This is verification, so even the obvious needs to be stated clearly. Below is a checklist general outline. The testbench must:

Behave nicely Collect coverage Perform directed tests Perform constrained random tests
This is a work in progress